ADT7468ZEVB【PDF 17/81 页】BOARD EVAL FOR ADT7468

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ADT7468

Single-Channel ADC Conversion

Setting Bit 6 of Configuration Register 2 (Reg. 0x73) places the

ADT7468 into single-channel ADC conversion mode. In this

mode, the ADT7468 can be made to read a single voltage

channel only. If the internal ADT7468 clock is used, the selected

input is read every 0.7 ms. The appropriate ADC channel is

selected by writing to Bits <7:5> of the TACH1 minimum high

byte register (0x55).

TACH1 Minimum High Byte (Reg. 0x55)

<7:5> Selects ADC channel for single-channel convert mode.

Table 5. Programming the Single Channel ADC Function

Bits <7:5> Reg. 0x55 Channel Selected

000 2.5 V

001 V CCP

010 V CC

011 5V

Configuration Register 2 (Reg. 0x73)

<4> = 1, averaging off.

<5> = 1, bypass input attenuators.

<6> = 1, single-channel convert mode.

Table 6. 10-Bit A/D Output Code vs. V IN

Input Voltage

100

101

110

111

12 V

Remote 1 temperature

Local temperature

Remote 2 temperature

A/D Output

12 V IN

<0.0156

0.0156–0.0312

0.0312–0.0469

0.0469–0.0625

0.0625–0.0781

0.0781–0.0937

0.0937–0.1093

0.1093–0.1250

0.1250–0.1406

4.0000–4.0156

8.0000–8.0156

12.0000–12.0156

15.8281–15.8437

15.8437–15.8593

15.8593–15.8750

15.8750–15.8906

15.8906–15.9062

15.9062–15.9218

15.9218–15.9375

15.9375–15.9531

15.9531–15.9687

15.9687–15.9843

>15.9843

5 V IN

<0.0065

0.0065–0.0130

0.0130–0.0195

0.0195–0.0260

0.0260–0.0325

0.0325–0.0390

0.0390–0.0455

0.0455–0.0521

0.0521–0.0586

1.6675–1.6740

3.3300–3.3415

5.0025–5.0090

6.5983–6.6048

6.6048–6.6113

6.6113–6.6178

6.6178–6.6244

6.6244–6.6309

6.6309–6.6374

6.6374–6.4390

6.6439–6.6504

6.6504–6.6569

6.6569–6.6634

>6.6634

V CC (3.3 V IN ) 1

<0.0042

0.0042–0.0085

0.0085–0.0128

0.0128–0.0171

0.0171–0.0214

0.0214–0.0257

0.0257–0.0300

0.0300–0.0343

0.0343–0.0386

1.1000–1.1042

2.2000–2.2042

3.3000–3.3042

4.3527–4.3570

4.3570–4.3613

4.3613–4.3656

4.3656–4.3699

4.3699–4.3742

4.3742–4.3785

4.3785–4.3828

4.3828–4.3871

4.3871–4.3914

4.3914–4.3957

>4.3957

2.5 V IN

<0.0032

0.0032–0.0065

0.0065–0.0097

0.0097–0.0130

0.0130–0.0162

0.0162–0.0195

0.0195–0.0227

0.0227–0.0260

0.0260–0.0292

0.8325–0.8357

1.6650–1.6682

2.4975–2.5007

3.2942–3.2974

3.2974–3.3007

3.3007–3.3039

3.3039–3.3072

3.3072–3.3104

3.3104–3.3137

3.3137–3.3169

3.3169–3.3202

3.3202–3.3234

3.3234–3.3267

>3.3267

V CCP

<0.00293

0.0293–0.0058

0.0058–0.0087

0.0087–0.0117

0.0117–0.0146

0.0146–0.0175

0.0175–0.0205

0.0205–0.0234

0.0234–0.0263

0.7500–0.7529

1.5000–1.5029

2.2500–2.2529

2.9677–2.9707

2.9707–2.9736

2.9736–2.9765

2.9765–2.9794

2.9794–2.9824

2.9824–2.9853

2.9853–2.9882

2.9882–2.9912

2.9912–2.9941

2.9941–2.9970

>2.9970

Decimal

0

1

2

3

4

5

6

7

8

256 (1/4 scale)

512 (1/2 scale)

768 (3/4 scale)

1013

1014

1015

1016

1017

1018

1019

1020

1021

1022

1023

Binary (10 Bits)

00000000 00

00000000 01

00000000 10

00000000 11

00000001 00

00000001 01

00000001 10

00000001 11

00000010 00

01000000 00

10000000 00

11000000 00

11111101 01

11111101 10

11111101 11

11111110 00

11111110 01

11111110 10

11111110 11

11111111 00

11111111 01

11111111 10

11111111 11

1

The V CC output codes listed assume that V CC is 3.3 V. If V CC input is reconfigured for 5 V operation (by setting Bit 7 of Configuration Register 1), then the V CC output

codes are the same as for the 5 V IN column.

Rev. 3 | Page 17 of 81 | www.onsemi.com

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